Verification of Opacity of a Transactional Mutex Lock

We have proved opacity of a transactional mutex lock using two different approaches with the proof assistants KIV and Isabelle. The first proof was based on linearizability and was done with KIV only. The second approach proves IO-Automata refinement to the TMS2 automaton. Earlier work [LLM12] shows this is sufficient to prove opacity. The second approach was first proved using Isabelle, then independently a slightly different proof was done with KIV. A description of all proofs, and a comparison of the two methods will appear in a forthcoming publication.

Simulation proof that TML refines the TMS2 automaton with Isabelle

The Isabelle proof can be found in the following files: The main theorem, that TML is trace included in TMS2, is in TMLCorrect.thy. TML.thy and TMS2.thy contain the TML and TMS2 automata, respectively. The files Transitions.thy and Interface.thy provide tools for uniformly constructing automata that represent STM implementations. The files Utilities.thy and RWMemory.thy define some concepts that are shared between the other theories. A tarball containing all files can be found here.

Proof that TML is opaque via Linearizability with KIV

The KIV proofs are based on (and assume the reader is familiar with) the explanations given in [FM15]. They are almost identical to the ones given here for [FM15], except that the type of memory has been changed from 'address -> int' to 'L -> V' (with typical values l and v) to be compatible with the definitions of the new publication. The overview over the specification structure can be used to browse through specifications, theorems and proofs. Here is a bottom-up explanation of the KIV proof.

Simulation proof that TML refines the TMS2 automaton with KIV

The KIV proofs are based on a framework of IO Automata refinement theory. This was originally created to compare to ASM refinement, a new completeness result for ASM refinement that also gives a completeness result for IO automata can be found here. The specifications were revised to have IO-Automata as specification objects. A lot of the theory given in [LynVaa95] is mechanised in this framework, and also some more results e.g. on normed simulations [GrifVaa98].

The overview over the specification structure therefore shows a quite big development graph, but almost all of it is irrelevant for the proof of the case study. The only interesting specifications are the one of an IO Automaton as a pair of a start and a step predicate with the constraint, that the start states must not be empty, and the definition of a forward simulation ≤F(cioaut,aiout) between two IO Automata (which is proven to imply refinement).

The refinement theory is imported into the project of the case study. The overview over the specification structure shows the following main specifications:


Update: KIV simulation proof with thread-local, step-local proof obligations

In recent work [ABZ23], we have further improved the support of KIV for (refinements of) IO Automata. KIV can now natively generate all required data structures and functions/predicates for defining an IOA from algorithms given in KIV's imperative programming language. Furthermore, invariants and refinements can now be proven using thread- and step-local proof obligations, reducing the verification effort significantly.

The project has been enhanced with the new automaton specifications and refinement proofs.

For more details on the alternative proof technique, see [ABZ23] and the web presentation of the associated case study.


Back to the overview of all KIV projects.
For general informations on KIV and a download site for the whole system refer to this page.


Bibliography

[FM15] J. Derrick, B. Dongol, G. Schellhorn, O. Travkin, H. Wehrheim.
Verifying Opacity of a Transactional Mutex Lock.

(FM 2015, Springer LNCS 9109, p. 161-177)

[ABZ23] G. Schellhorn, S. Bodenmüller, W. Reif
Thread-Local, Step-Local Proof Obligations for Refinement of State-Based Concurrent Systems.

(submitted to ABZ 2023)

[LynVaa95] N. Lynch and F.W. Vaandrager
Forward and Backward Simulations - Part I: Untimed systems.

(Information and Computation 1995, vol. 121(2), p. 214-233)

[LLM12] M. Lesani, V. Luchangco, M. Moir
Workshop on Transactional Memory.

(2012)

[GrifVaa98] W.O.D. Griffioen and F.W. Vaandrager
Normed Simulations.

(CAV 1998, Springer LNCS 1427, p. 332-344)


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